CX532P-M-H, 32x 100G QSFP28, 2x 10G SFP+, Core Switch

SKU:

Hot-pluggable PSU&FAN | Marvell Falcon | SONiC OS

CX532P-M-H — 1RU 100G enterprise core switch with 32× 100G QSFP28 + 2× 10G SFP+, powered by the Marvell Prestera Falcon 3.2T (98CX8522) ASIC and open SONiC-based AsterNOS.

  • 32× 100G QSFP28 + 2× 10G SFP+, 3.2 Tbps wire-speed L2/L3 in a compact 1RU
  • Open SONiC (AsterNOS) — no per-feature licensing, no vendor lock-in
  • 504K IPv4 / 252K IPv6 routes, 32K MAC entries, 24MB packet buffer
  • EVPN Multihoming for all-active server redundancy without dedicated peer links
  • Optional MPLS module and IEEE 1588v2 PTP Class C (SMPTE 2059-2 / AES67)
  • Hot-swappable 1+1 PSU / 4+1 fans, optional Network Packet Broker container
Request Discount

3.2 Tbps

Switching Capacity

2800 Mpps

Forwarding Rate

504K

IPv4 Routes

32K

MAC Table Size

The CX532P-M-H is a 1U enterprise core switch

that delivers 32× 100G QSFP28 ports plus 2× 10G SFP+ for 3.2 Tbps of switching capacity, with a forwarding rate of 2.8 Bpps and 24MB of packet buffer for non-blocking core-layer performance. Built on the Marvell Prestera Falcon ASIC and running Enterprise SONiC (AsterNOS), it is purpose-built as a high-capacity core switch for enterprise campus networks, data center fabrics and service provider backbones, aggregating and routing traffic across the network without becoming the bottleneck. With 504K IPv4 routes, 252K IPv6 routes and 32K MAC entries, the CX532P-M-H anchors networks that scale from a handful of racks to large multi-tier deployments. Each 100G port breaks out to 4×25G or 4×10G — so a single switch can fan out to a large number of downlink connections to aggregation-layer switches or dense server racks, with flexible topology choices.

Enterprise SONiC, full L2/L3 and open management

The switch ships preloaded with AsterNOS, Enterprise SONiC distribution, with a single software image across the CX-M-H family. On top of it sits a complete Layer 2/Layer 3 feature set — VXLAN, BGP-EVPN, GRE/static GRE tunnels, static routing, VRF, OSPFv2/v3, BGP, MP-BGP and MLAG — for multi-tenant overlays and dynamic route management at the network core. Automation interfaces include ZTP, RESTful APIs, NETCONF/YANG and gNMI, so the switch plugs into existing infrastructure-as-code pipelines without a separate management workflow.

High availability at the core

AsterNOS adds EVPN Multihoming for all-active redundancy to downstream switches without dedicated peer links, improving load balancing and simplifying multi-vendor deployments at the aggregation boundary. An optional MPLS module extends the switch with label-switched path management and MPLS-based redundancy for topologies where the core must stay reachable through multiple failure scenarios.

Optional precision timing

Timing-sensitive deployments can add the optional PTP extension card. The hardware port supports PTP as a Boundary Clock (BC) or Transparent Clock (TC), with IEEE 1588v2 and SMPTE 2059-2 support and PTP Class C accuracy (≤10ns maximum time error) — relevant where the core switch also needs to distribute a common clock reference, such as financial infrastructure or broadcast networks.

Operations and traffic visibility

The switch integrates sFlow and Telemetry for continuous KPI export, with ZTP cutting deployment time and manual intervention across the core layer. An optional Network Packet Broker container, built on SONiC's containerized architecture, adds traffic mirroring, filtering, aggregation, preprocessing, load balancing and output replication without a separate appliance — useful for monitoring traffic that converges at the core.

Centralized management with Asteria Network Controller

The CX532P-M-H is managed by the Asteria Network Controller, Asterfusion's unified platform for the CX-M switch family alongside APs, routers, and PON sticks. Zero-Touch Provisioning brings new switches online without manual CLI configuration. The controller provides topology discovery, device status monitoring and scripted configuration or firmware updates across multiple switches from a single interface. On-premises deployment is available with no licensing fee.

Enterprise-grade reliability

The CX532P-M-H uses hot-swappable 1+1 redundant power supplies and 4+1 (N+1) redundant, hot-swappable fans to eliminate single points of failure. Front-to-rear / Rear-to-front airflow and 100–240V AC / 36-72V DC input suit rack-mount campus deployments — making the CX532P-M-H a dependable foundation for campus, enterprise and data center core networks.

Data Plane Ports (100G)32× 100GbE QSFP28
Data Plane Ports (10G)2× 10GbE SFP+
Switch ASICMarvell Prestera Falcon
Operating SystemAsterNOS (Enterprise SONiC)
Switching Capacity3.2 Tbps
Forwarding Rate2,800 Mpps
Packet Buffer24 MB
MAC Address Entries32K
IPv4 Prefix Routes504K
IPv6 Prefix Routes252K
Control CPUPentium D1508
Flash128GB M.2 SATA
AirflowFront-to-rear | Rear-to-front
Management Ports1× USB 2.0, 1× Console RJ45, 1× MGMT RJ45
Power Supplies1+1 Hot-swappable
Fan Modules4+1 Hot-swappable
Input Voltage100–240 V AC | 36-72V DC
Max. Power Consumption495 W
Form Factor1 RU
Dimensions (H×W×D)44×440×515 mm
Operating Temperature0–45 °C (32–113 °F)
Operating Humidity10%–90% (non-condensing)

Optimized Software for Advanced Workloads-AsterNOS

AsterNOS is the pre-installed network operating system on Asteraix’s CX-M Series campus switches. Built on SONiC and enhanced beyond the open-source version, AsterNOS offers advanced Layer 2 and Layer 3 features, as well as sophisticated routing capabilities. Support VXLAN EVPN virtualization, it supports scalable campus networks. AsterNOS is smart, secure, and easy to manage, providing a reliable operating platform for always-on enterprise networks.

Layer 2 Features
4K VLANs
Voice VLAN
Multiple Spanning Tree Protocol
QinQ
Link Aggregation Control Protocol
Multi-Chassis Link Aggregation
VLAN Trunking
Link Layer Discovery Protocol (LLDP)
LLDP Enhancements for PoE
Port Isolation
Jumbo Frames (9216 Bytes)
IGMP Snooping
Storm Control
Monitor Link
BPDU Guard, BPDU Filter
Loopback Detection
Layer 3 Features
IPv4/v6 Dual Stack
Policy Based Routing
Resilient ECMP
ARP-to-Host
VRF
Bi-Directional Forwarding Detection (BFD)
IGMP v2/v3
Route Map
VRRP
GRE
Routing Protocols: OSPF v2/v3, BGP, MP-BGP
Virtualization Features
Type 2: MAC/IP Advertisement
Type 3: Inclusive Multicast Route
Type 5: IP Prefix Route
Centralized Gateway
Distributed Gateway
Mgmt & Monitoring
Asteria Campus Controller
Industry Standard CLI
Zero Touch Provisioning (ZTP)
SNMP v1/v2/v3
sFlow
Port Mirroring
Syslog
Log Management
PTP IEEE 1588v2 (TC and BC)
Containerized Custom Tools
BGP/BFD Operational Status
Quality of Service
8 Queues per Port
802.1p Based Classification
DSCP Based Classification
Strict priority queueing
DWRR Scheduling
Policing/Shaping
Rate Limiting
Security Features
Service ACLs
ACL Logging and Counters
Control Plane Policing (CoPP)
Dynamic ARP Inspection (DAI)
IP Source Guard v4/v6
DHCPv4/v6 Relay
DHCPv4/v6 Snooping
ND Snooping
802.1x Authentication
Portal Authentication
MAC Authentication Bypass (MAB)
Dynamic VLAN Assignment
TACACS+
RADIUS
IPSG/DAI/SAVI

Marvell® Prestera® Falcon 2.0T–12.8T (Prestera 98CX85xx family)

The CX-N-V2 data center switch family is built on Marvell’s 9th-generation, 16nm Prestera Falcon packet processors, scaling from 2.0 Tbps leaf platforms through 3.2 Tbps spine/leaf designs to 12.8 Tbps high-radix spine switches within the same merchant-silicon architecture. Falcon pairs large shared L2/L3 forwarding and LPM tables with a globally shared, dynamic-threshold packet buffer for superior microburst absorption under heavy east-west load. Exposing the standard SAI and TAM APIs, it is what lets open SONiC-based AsterNOS run consistently across the entire CX-N-V2 line — with no proprietary forwarding stack and no feature licensing.

Architecture & performance

  • 9th-generation, 16nm Marvell Prestera Falcon — 2.0 Tbps to 12.8 Tbps wire-speed switching across the 98CX85xx family
  • Large shared tables: 128K MAC, 288K IPv4 / 144K IPv6 prefixes, high-scale multi-tenant L2/L3
  • Globally shared packet buffer with dynamic thresholds for microburst (µBurst) absorption
  • Cut-through switching and dynamic load balancing (DLB) across the fabric

Virtualization & overlays

  • eBridge unified virtualization architecture with hardware-based interface/domain virtualization
  • Programmable header editor: hardware-accelerated VXLAN, VXLAN-GPE, Geneve and NSH
  • MPLS and IPv6 segment routing for flexible transport

RDMA, telemetry & openness

  • RoCEv2-aware congestion management for lossless RDMA storage and AI/ML traffic
  • In-band network telemetry built into the data path — sFlow, IPFIX, remote port analysis
  • Open Switch Abstraction Interface (SAI) + Telemetry & Monitoring (TAM) APIs — merchant-silicon foundation for SONiC/AsterNOS
Enterprise switch family datasheet Enterprise Core and Aggregation Switches Datasheet (PDF)
Quick start guide for AsterNOS CLI AsterNOS Documentation

The dual 1+1 hot-swappable power supplies ensure continuous operation by allowing replacement without system shutdown.

Equipped with 4+1 hot-swappable fan modules, the system delivers reliable cooling performance, maintaining stability and efficiency under demanding workloads.

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