64 x 800Gb OSFP AI Switch, 51.2Tbps, Sub-560ns Latency

SKU: CX864E-N

In stock

$46,800.00

  • 51.2 Tbps in 2RU: Supports 64×800G, 128×400G, or 512×100G breakout modes.
  • Ultra-low latency: Sub-560 ns port-to-port.
  • Massive buffering: 200MB+ on-chip buffer optimized for RoCE.
  • Precision timing: 10 ns PTP & SyncE for AI synchronization.
  • Advanced telemetry: INT for real-time packet visibility and congestion control.
  • Efficient power: Max power consumption 2400W under full load (64×800G SR8).
  • Open AsterNOS: Enterprise SONiC pre-installed with top-tier SAI support.
  • RoCE & AI fabrics: RoCEv2, BGP-EVPN, VXLAN, MLAG, PFC, ECN, DCBX, and multicast collectives.
  • Fully compatible: Works with all major GPUs and SmartNICs.
  • UEC ready: Line-rate programmable for future Ultra Ethernet standards.
  • 800G ZR/ZR+ optics: Metro and long-haul connectivity options.
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560 ns

Ultra Low Latency

200+ MB

Packet Buffer

2400W

Max Power Consumption

↓ 5% vs. IB

Training Job Completion Time

↑ 27.5% vs. IB

Inference Token Generation Rate

Designed for AI inference and training, high-performance computing (HPC), and cloud-scale storage, the Asteraix CX864E-N delivers 51.2 Tbps switching capacity in a compact 2RU form factor with 64×800G OSFP. Built on Marvell Teralynx 10, this switch supports ultra-low latency (Sub-560 ns) and line-rate L2/L3 forwarding. Enterprise SONiC (AsterNOS) is pre-installed for RoCEv2, EVPN multi-homing, and cloud-native operation. Networking- Support for all leading collective communication libraries, including NCCL, RCCL, oneCCL, BCL, MPI, and Gloo

  • Optimize collective operations (Allreduce, Allgather, All-to-all, Broadcast) with built-in multicast
  • Support various network topologies, including spine-leaf, fat-tree, dragonfly, butterfly, 3D mesh/torus, hyper-x, and hypercube
  • Full RoCEv2 data path with PFC, ECN, DCBX, and INT for lossless AI fabrics
  • BGP-EVPN, VXLAN, and MLAG for scalable leaf-spine and multi-tenant deployments

Use case scenarios

  • AI / ML training and inference clusters
  • High-performance computing (HPC) fabrics
  • Cloud and colocation spine-leaf networks
  • High-density data center top-of-rack (ToR)
  • Storage networks with RoCEv2 optimization
Data Plane Ports (800G)64x800GbE OSFP
Data Plane Ports (400G)128x400GbE OSFP
Data Plane Ports (200G)256x200GbE QSFP56
Data Plane Ports (100G)512x100GbE QSFP28
Switch ASICMarvell Teralynx
Switching Capacity51.2Tbps
Forwarding Rate14.4Bpps
Packet Buffer200MB
Control CPUIntel Xeon 8-core
Control Plane Memory32GB SODIMM | 256GB SSD
ARP Entries36K
Mac Addr. Entries44K
IPv4 Prefix Routes72K
IPv6 Prefix Routes36K
Power Module1+1 Hot- swappable
FAN Modules3+1 Hot-swappable
Input Range100- 240V AC / 200-320V DC
Max Power Consumption2400Watt (with full ports of 800G-SR8)
Rack Space2U
Management Ports1xUSB2.0, 1xConsole RJ45, 1xMGMT RJ45
AirflowFront to Rear
Dimension (HxWxD)87x440x650mm
Op.Temperature0 - 40℃ (32 to 104°F)
Op. Humidity5% - 90% (non-condensing)

AsterNOS – Enterprise SONiC, Optimized for Performance

AsterNOS is Asterfusion’s enhanced SONiC distribution, pre-installed on every CX Series switch. Built for modern data centers, it combines open-source flexibility with enterprise-grade reliability, usability, and speed. Battle-tested and production-ready, AsterNOS delivers the stability and performance you need — empowering your network to run smarter, faster, and stronger.

Layer 2 Features
4096 VLANs
Multiple Spanning Tree Protocol (MSTP)
Link Aggregation Control Protocol (LACP)
128 LAG groups / 64 LAG members
Multi-Chassis Link Aggregation (MC-LAG)
Link Layer Discovery Protocol (LLDP)
Jumbo Frames (9K Bytes)
Storm Suppression
Port Isolation
Monitoring Link
Layer 3 Features
Routing Protocols: OSPF, OSPFv3, BGP, MP-BGP,IS-IS
Equal Cost Multipath Routing (ECMP)
VRF
Bi-Directional Forwarding Detection (BFD)
Route Maps
VRRP
Policy-Based Routing (PBR)
AIDC Intelligent Routing
Virtualization Features
VXLAN Routing and Bridging
Anycast Gateway
Distributed/Centralized Gateway
Ethernet Auto Discovery
Symmetry IRB
EVPN Multi-homing
Mgmt & Monitoring
Console, SSH, Telnet, REST API, NETCONF
Management over IPv6
Industry Standard CLI
Syslog
Zero Touch Provisioning (ZTP)
Containerized Custom Tools
SNMPv2, SNMPv3, SNMP Trap
SPAN, ERSPAN
sFlow
In-band Network Telemetry (INT)
Buffer Drop Capture
High Delay Capture
AsterNOS Exporter (Prometheus)
Grafana Dashboard
RoCE Status
Prometheus Alarm & Alert
Quality of Service
802.1p-based classification
DSCP-based classification and Remarking
Strict priority queueing
DWRR Scheduling
Port/Queue-Based Traffic Shaping
Rate limiting
Explicit Congestion Notification (ECN)
Per-Priority Flow Control (PFC)
PFC Watchdog
Data Center Bridging Extensions (DCBX)
RoCEv2
One-step RoCE Configuration
Security Features
IPv4/IPv6 Ingress ACLs
IPv4/IPv6 Egress ACLs
User-defined Field (UDF) Matching
Control Plane Policing (CoPP)
Service ACLs
TACACS+
RADIUS

Marvell® Teralynx® 10 (98TX9180)

The Teralynx 10 is Marvell’s 51.2 Tbps programmable Ethernet switch chip built on a 5nm monolithic process, with up to 51.2 Tbps throughput. The chip integrates the industry’s lowest-latency switch and buffer fabric, a line-rate programmable forwarding pipeline, and the Teralynx® Flashlight™ telemetry engine — purpose-built for cloud data center leaf/spine, AI/ML training and inference fabrics, and HPC interconnects. Open SDK and SAI APIs deliver native SONiC support with full software compatibility across the Teralynx 7 and Teralynx 10 families.

Architecture & performance

  • 51.2 Tbps full-duplex switching on a 5nm monolithic die with a 512-port radix — industry’s highest single-chip port density
  • 200+ MB shared packet buffer with dynamic thresholds for microburst (µBurst) absorption
  • Cut-through latency as low as 560 ns at full load; sub-600 ns across all packet sizes
  • 512 × 112G LR SerDes with the industry’s lowest BER; supporting 25/50/100/200/400/800 GbE port configurations

Programmable forwarding

  • Line-rate Permutable Flex-Forwarding — new protocols via software upgrade, no ASIC respin required
  • Comprehensive tunneling support: IP-in-IP, GRE, MPLS, VXLAN, and Geneve
  • Scalable L2/L3 forwarding tables for IPv4/IPv6; congestion-aware routing for network utilization and proactive congestion prevention

QoS, RDMA & AI fabric

  • Full DCB + RoCEv2 lossless Ethernet for AI/ML training, inference, and distributed storage
  • Advanced QoS with rich scheduling and shaping for multi-tenant, multi-priority workloads
  • PTP (IEEE 1588v2) and SyncE timing and synchronization support for latency-sensitive applications

Telemetry & openness

  • Teralynx® Flashlight™ real-time telemetry engine with P4 in-band network telemetry (INT) and critical extensions
  • Enables predictive analytics, fast fault isolation, and automated remediation — delivering self-aware, self-healing networks
  • Open SDK + OCP SAI APIs with native SONiC platform support; fully software-compatible with Teralynx 7 for customer migration
Low-latency AI RoCE Switch family datasheet Low-latency AI RoCE Switches Datasheet (PDF)
Quick start guide for AsterNOS CLI AsterNOS Documentation

The dual 1+1 hot-swappable power supplies ensure continuous operation by allowing replacement without system shutdown.

Equipped with 3+1 hot-swappable fan modules, the system delivers reliable cooling performance, maintaining stability and efficiency under demanding workloads.

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